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Using Makefile

17 Sep 2020 3:12 #26370

In SCC, you can simply /DEFINE a symbol. I use this:

SCC.EXE '.\KML_COORDINATES\kml_convert.c' /List /DEFINE CMASTER /NO_BANNER /DELETE_OBJ_ON_ERROR /ERROR_NUMBERS /UNLIMITED_ERRORS /SILENT /BINARY '$(DESTINATION)\KML_CONVERT.obj'

in my MAKEFILE. I also use a /DEFINE with a specific assignment to the DEFINE'd variable in other SCC compile steps.

I also use the following for FTN95 in the make file with this statement setting the MAKEFILE variable:

RESTRICTED_COMPILE:= /VPARAM RESTRICTED 1

and the compile step uses '/VPARAM RESTRICTED 1' as the compile options. In the code, using #ifdef or #ifndef on the symbol RESTRICTED allows conditional compilation, not assignment of a value (unfortunately).

I don't know if this helps or not. I do know that in the MAKEFILE, one can do a number of extraordinary things to allow the MAKEFILE to accommodate various compiler requirements. It is all done through run-time string manipulation.

17 Sep 2020 3:51 #26371

Paul and Bill,

Thanks to both of you. I'll try to follow Bill's advice regarding /define, see if I can use SCC to do what I want, and come back if I fail.

21 Sep 2020 10:13 #26377

The FTN95 command line options have been extended for the next release. The aim is to allow all of the forms listed by mecej4 above, namely

ftn95 a.f b.obj ftn95 a.f b.obj c.lib -o my.exe ftn95 /c a.f ftn95 /lis a.f90

Minor limitations will remain for .NET compilations.

The aim is to provide an interim release shortly so that these changes can be fully beta tested before the next major release.

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